1. Field of the Invention
The present invention relates to a semiconductor display device using a semiconductor element (an element using a semiconductor thin film), and in particular to a liquid crystal display device. Further, the present invention relates to electronic equipment using the semiconductor display device in a display portion.
2. Description of the Related Art
Techniques of using a semiconductor thin film (on the order of several nm to several hundred of nm thick) formed on a substrate having an insulating surface in order to form a thin film transistor (TFT) have been in the spotlight in recent years. Thin film transistors are widely applied to electronic devices such as ICs and semiconductor display devices, and in particular, are rapidly being developed as switching elements for liquid crystal display devices.
An active matrix liquid crystal display device has a pixel portion composed of a plurality of pixels, each of which has a TFT (pixel TFT) and liquid crystal cell. The liquid crystal cells have a pixel electrode, an opposing electrode, and a liquid crystal formed between the pixel electrode and the opposing electrode. An image is displayed in the pixel portion by controlling the voltage applied to the pixel electrodes by the pixel TFTs.
In particular, a high mobility can be obtained from a TFT using a semiconductor film having a crystalline structure as an active layer (crystalline TFT), and it is therefore possible to integrate functionality circuits on the same substrate and realize a liquid crystal display device that performs a high definition image display.
Semiconductor films having a crystalline structure include single crystal semiconductors, polycrystalline semiconductors, and microcrystalline semiconductors in this specification, and in addition, include the semiconductors disclosed in Japanese Patent Application Laid-open No. Hei 7-130652, Japanese Patent Application Laid-open No. Hei 8-78329, Japanese Patent Application Laid-open No. Hei 10-135468, and 10-135469.
Between one million and two million crystalline TFTs are necessary in only the pixel portion in order to structure the active matrix liquid crystal display device, and more than that number of crystalline TFTs are required for the attached functionality circuits formed in the periphery. The specifications required for the liquid crystal display device are strict, and in order to perform stable image display, it is necessary to assure the reliability of each crystalline TFT.
TFT characteristics can be considered as divided between those of an on state and those of an off state. Characteristics such as on current, mobility, S-value, and threshold value can be known from on state characteristics, and off current is the most important off state characteristic.
However, there is a problem in that the off current easily becomes high with crystalline TFTs.
Furthermore, crystalline TFTs are still not used in MOS transistors (transistors manufactured on a crystalline semiconductor substrate) used in LSIs from a reliability standpoint. For example, a degradation phenomenon in which the mobility and the on current (the electric current flowing when the TFT is in an on state) drop, and the off current (the electric current flowing when the TFT is in an off state) rises, when a crystalline TFT is continuously driven has been observed. It is thought that the hot carrier effect is the cause, and that the degradation phenomenon is caused by hot carriers developing due to a high electric field in the vicinity of a drain.
A lightly doped drain (LDD) structure is known as a method of lowering the off current and relieving the high electric field in the vicinity of the drain in a MOS transistor. A low concentration impurity region is formed on the outside of a channel region with this structure, and the low concentration impurity region is referred to as an LDD region.
In particular, the high electric field in the vicinity of the drain is relieved, the hot carrier effect can be prevented, and the reliability can be increased when there is a structure in which the LDD region overlaps with a gate electrode through a gate insulating film (GOLD (gate-drain overlapped LDD) structure). Note that a region in which the LDD region overlaps with the gate electrode through the gate insulating film is referred to as an Lov region (first LDD region) in this specification.
Note also that structures such as an LATID (large tilt angle implanted drain) structure and an ITLDD (inverse T LDD) structure are known as GOLD structures. There is a GOLD structure in which sidewalls are formed by silicon, for example, reported in Hatano, M., Akimoto, H., and Sakai, T., IEDM97 Technical Digest, positive. 523-6, 1997, and it has been confirmed that an extremely superior reliability can be obtained compared with other TFT structures.
Note that, in this specification, a region in which the LDD region does not overlap with the gate electrode through the gate insulating film is referred to as an Loff region (second LDD region).
Several methods of manufacturing a TFT possessing both an Loff region and an Lov region have been proposed. A method of only using a mask without self alignment, and a method of using a gate electrode having two layers with mutually differing widths and a gate insulating film with self alignment, can be given as methods of forming the Lov region and the Loff region.
However, two masks are required in order to form the Lov region and the Loff region when using a mask, and the number of process steps is increased. On the other hand, when forming the Lov region and the Loff region with self alignment, the number of masks need not be increased, and it is possible to suppress the number of process steps. However, the width of the gate electrode and the thickness of the gate insulating film influence the position in which the Lov region and the Loff region are formed. The etching rates of the gate electrode and the gate insulating film often differ largely and it is difficult to precisely control the positional alignment of the Lov region and the Loff region.